1. Field of the Invention
The present invention relates to a method of fabricating and mounting flip chips, and in particular, to a method of fabricating and mounting flip chips without using a flux.
2. Description of the Related Art
Generally, a solder bump flip chip packaging method comprises forming a plurality of microscopic solder bumps having a diameter of 200 μm or less on a front side of a device chip, and bonding the solder bumps to a circuit board, thereby mounting the device chip on the circuit board. Such a solder bump flip chip packaging technology has a smaller mounting area and a higher mounting density than other conventional chip packaging technologies.
Aluminum is used as an input and an output pad of a device in a form of a flip chip package. However, a wettability of solder bumps to the aluminum is poor. Accordingly, an under bump metallurgy (UBM) layer is deposited on the aluminum pads so as to secure an improved wettability.
Methods of coating a predetermined amount of a solder on the UBM layer include a heat deposition method, an electrolytic plating method, a stencil printing method, a stud wire bumping method, and a laser ball bonding method. The above methods all accompany a reflow process, after a solder coating process, in which the solder is melted to form solder bumps having a sphere shape. The reflow process is also conducted so as to homogenize a composition and a height of the solder bumps, and improve bonding strength of the solder bumps to the corresponding UBM layer.
In a conventional reflow process, a so-called flux is coated on a solder prior to the melting of the solder. The flux functions to remove an oxide film from a solder surface during the reflow process and prevent the solder from re-oxidizing to reshape the melted solder in a form of a sphere by a surface tension thereof. However, after the application of the flux, if the flux remaining around the solder bumps is not sufficiently removed, the highly corrosive flux around the solder bumps corrodes a circuit board bonded to a chip package having the solder bumps, to negatively affect the operation and reliability of the circuit board.
A conventional solvent used to rinse the flux contains volatile organic compounds, and therefore causes air pollution leading to the destruction of the ozone layer and global warming. Accordingly, international restrictions, for example, Montreal Convention of 1992, on use of such a solvent have increased dramatically. In addition, because the solder bumps of a conventional flip chip have become smaller in size and an interval between the solder bumps has become narrower with the development of a flip chip package technology, it is increasingly more difficult to sufficiently rinse and remove the flux from the solder bumps. To solve this, flux-free bumping technologies of reflowing the solder bumps without the flux have been proposed.
Conventional flux-free bumping technologies are classified into a process using a carboxylic acid vapor and a process using a plasma. According to the process using the carboxylic acid, an oxide film on a solder surface is reduced using gas containing carboxylic acid, such as a formic acid and an acetic acid, during a reflowing of the solder. However, this process has a disadvantage in that wasted gas containing large quantities of the carboxylic acid is produced, and this gas inevitably must be treated.
In Japanese Patent Laid-open Publication No. 5-500026 (U.S. Pat. No. 4,921,157), there is disclosed a process using a fluorine-containing plasma, in which an oxide film that obstructs a wetting of a melted solder to a flip chip during a reflowing of the solder is converted into a fluorinated oxide film, by fluorinating a solder surface using the fluorine contained plasma. However, this process has disadvantages in that hydrogen hexafluoride used in this process is environmentally harmful. Furthermore, the fluorine plasma corrodes silicon and a passivation film, and a silicon tetrafluoride product damages the solder bumps. Another disadvantage of this process is that the remaining fluorine negatively affects the reliability of a resulting chip package according to an amount of the remaining fluorine.
Korean Patent Laid-open Publication No. 2000-778 discloses a method of reflowing indium bumps using a 100% pure hydrogen plasma. However, this method has a disadvantage in that hydrogen is a dangerous and highly explosive material.
On the other hand, Korean Patent Laid-open Publication No. 2001-32162 (EP 1043766-A1) discloses a method of reflowing a solder, the method comprising generating a plasma using a mixed gas containing 3 to 8% hydrogen, etching an oxide film of a solder surface, and heating the solder using a halogen lamp. However, in this method, there is a disadvantage of needing the halogen lamp as an additional heat source to reflow the solder as a process of removing the oxide film and a process of heating the solder are separately conducted.